MATERIALS TRANSACTIONS
Online ISSN : 1347-5320
Print ISSN : 1345-9678
ISSN-L : 1345-9678
Electromigration Behavior of through-Si-via (TSV) Interconnect for 3-D Flip Chip Packaging
Sang-Su HaJun-Mo YangSeung-Boo Jung
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2010 Volume 51 Issue 5 Pages 1020-1027

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Abstract

The electromigration of conventional Sn-37Pb (in mass%) solder bumps was investigated with a current density of 2.0×104 A/cm2 at 393 K using three-dimensional (3-D) flip-chip specimens comprised of an upper Si chip and a lower FR-4 substrate. Electromigration failure of the Sn-37Pb solder bumps occurred with complete consumption of electroless Ni immersion Au (ENIG) under bump metallization (UBM) and void formation at the cathode side of the solder bump. Cross-sectional studies were conducted with scanning electron microscopy (SEM). Ni3Sn4 intermetallic compound (IMC) layers were formed in both interfaces, while a typical eutectic structure of Pb- and Sn-rich phases was formed within the solder region. After 11 h current stressing, separation of the Pb- and Sn-rich phases occurred in the solder bump, while a void was formed in the cathode-side bump. After 18 h current stressing, the solder joints catastrophically failed due to the re-melting of the solder bump.

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© 2010 The Japan Institute of Metals and Materials
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