抄録
About one year ago the first full field F2 step and scan systems have been introduced and resist process optimisation concentrating on full field issues could be started. This paper reports on the resist benchmarking, process optimisation and etch integration challenges for 157nm resists on an ASML MS VII 0.75 NA full field system. Several 157nm resists have been evaluated in terms of resolution, processing latitudes, delay stability and line-edge-roughness. Good progress in resist maturity is seen. Feasibility of sub-50nm gate patterning using 157nm resist in combination with hard masks has successfully been demonstrated.