Abstract
One of the key issues for semiconductor chip packaging in microelectronics technology is the reliability of the chip packaging during harsh temperature change in practical use. Typically, a thermal expansion mismatch between a silicon chip and a package substrate causes cracks between interconnecting bumps after the thermal cycling when the wiring pitch becomes fine. To overcome this problem, we have developed a new dielectric film which has extremely low CTE (Coefficient of Thermal Expansion) with the almost equal value to silicon over a wide range of temperature. The film will realize thermally-reliable interconnection at package substrate fabrication and in high temperature applications.
