Improvements of Via-Filling in Neutral Electroless Copper Plating for ULSI Metallization

Abstract

The formation of LSI copper minute wiring by the electroless plating process is expected to become a dominant process for LSI interconnection because of the advantages in obtaining a film of uniform thickness on a dielectric film. Moreover, there is a possible application in three-dimensional wiring and three-dimensional mounting, which use the ball chip technology. However, the conformal deposition of metal basically takes place in electroless plating. The copper electroless deposition was done using neutral electroless plating after the copper seed layer of the sillicon wafer surface had pre-adsorbed PEG 4000 under the condition of coexistence with chloride ions. In the method utilizing pre-adsorption, a minute contacthole can be filled with copper without causing a seam due to the effect of the pre-adsorbed additive. The copper film obtained from this process is advantageous in electromigration (EM) resistance, because the priority orientation the (111) plane, which is the close-packed plane of the fcc structure, is shown and the crystallite size is 37nm. The specific resistance of the copper film is 1.85μΩ·cm.