抄録
In this paper, a sepic-type single-stage electronic ballast (STSSEB) is proposed, which is derived from the combination of a sepic converter and a half-bridge inverter. The ballast can not only step down input voltage directly but achieve high power factor, reduce voltage stress, improve efficiency and lower cost. Since component stress is reduced significantly, the presented ballast can be applied to high voltage mains. Derivation of the STSSEB is first presented. Then, analysis, design and practical consideration for the STSSEB are discussed. A 347Vac 60W prototype has been simulated and implemented. Simulations and experimental results have verified the feasibility of the proposed STSSEB.
