Software-based Time-aware Shaper for Time-sensitive Networks

抄録

This paper presents the design, implementation, and evaluation of a time-aware shaper, which is a traffic shaper specifically designed for IEEE 802.1Qbv-compliant time-sensitive networks. The proposed design adopts a software-based approach rather than using a dedicated custom logic chip such as an ASIC or FPGA. In particular, the proposed approach includes a run-time scheduler and a network interface card (NIC) that supports a time-based transmission scheme (i.e., launch-time feature). The run-time scheduler prefetches information (i.e., gate control entry) ahead of time from a given gate control list. With the prefetched information, the scheduler determines a launch time for each frame, and the NIC controls the time at which the transmission of each frame is started in a highly punctual manner. Evaluation results show that the proposed shaper triggers transmission of multiple time-sensitive streams at their intended timings in accordance with a given gate control list, even in the presence of high-bandwidth background traffic. Furthermore, we compare the timing accuracy of frame transmission with and without use of the launch-time feature of the NIC. Results indicate that the proposed shaper significantly reduces jitter of time-sensitive streams (to less than 0.1 μs) unlike a baseline implementation that does not use the launch-time feature.