IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
Power-Supply Rejection Model Analysis of Capacitor-Less LDO Regulator Designs
Soyeon JOOJintae KIMSoYoung KIM
著者情報
ジャーナル 認証あり

E100.C 巻 (2017) 5 号 p. 504-512

詳細
PDFをダウンロード (2249K) 発行機関連絡先
抄録

This paper presents accurate DC and high frequency power-supply rejection (PSR) models for low drop-out (LDO) regulators using different types of active loads and pass transistors. Based on the proposed PSR model, we suggest design guidelines to achieve a high DC PSR or flat bandwidth (BW) by choosing appropriate active loads and pass transistors. Our PSR model captures the intricate interaction between the error amplifiers (EAs) and the pass devices by redefining the transfer function of the LDO topologies. The accuracy of our model has been verified through SPICE simulation and measurements. Moreover, the measurement results of the LDOs fabricated using the 0.18 µm CMOS process are consistent with the design guidelines suggested in this work.

著者関連情報
© 2017 The Institute of Electronics, Information and Communication Engineers
前の記事

閲覧履歴
feedback
Top