IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Solid-State Circuit Design - Architecture, Circuit, Device and Design Methodology
A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology
Shin-ichi O'UCHIKazuhiko ENDOTakashi MATSUKAWAYongxun LIUTadashi NAKAGAWAYuki ISHIKAWAJunichi TSUKADAHiromi YAMAUCHIToshihiro SEKIGAWAHanpei KOIKEKunihiro SAKAMOTOMeishoku MASAHARA
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2012 年 E95.C 巻 4 号 p. 686-695

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This paper demonstrates a FinFET operational amplifier (opamp), which is suitable to be integrated with digital circuits in a scaled low-standby-power (LSTP) technology and operates at extremely low voltage. The opamp is consisting of an adaptive threshold-voltage (Vt) differential pair and a low-voltage source follower using independent-double-gate- (IDG-) FinFETs. These two components enable the opamp to extend the common-mode voltage range (CMR) below the nominal Vt even if the supply voltage is less than 1.0V. The opamp was implemented by our FinFET technology co-integrating common-DG- (CDG-) and IDG-FinFETs. More than 40-dB DC gain and 1-MHz gain-bandwidth product in the 500-mV-wide input CMR at the supply voltage of 0.7V was estimated with SPICE simulation. The fabricated chip successfully demonstrated the 0.7-V operation with the 480-mV-wide CMR, even though the nominal Vt was 400mV.
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© 2012 The Institute of Electronics, Information and Communication Engineers
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