IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Recent Trends of Microwave Systems and Their Fundamental Technologies
A 120-GHz Transmitter and Receiver Chipset with 9-Gbps Data Rate Using 65-nm CMOS Technology
Ryuichi FUJIMOTOMizuki MOTOYOSHIKyoya TAKANOUroschanit YODPRASITMinoru FUJISHIMA
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2012 年 E95.C 巻 7 号 p. 1154-1162

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The design and measured results of a 120-GHz transmitter and receiver chipset are described in this paper. A simple on-off keying (OOK) modulation is adopted for low power consumption. The proposed transmitter and receiver are fabricated using 65-nm CMOS technology. The current consumption of the transmitter and receiver are 19.2mA and 48.2mA respectively. A 9-Gbps PRBS is successfully transferred from the transmitter to the receiver with the bit error rate less than 10-9.
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© 2012 The Institute of Electronics, Information and Communication Engineers
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