IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Analog Circuits and Related SoC Integration Technologies
High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2:1 Multiplexer and 1:2 Demultiplexer Modules Using 1-µm InP/InGaAs/InP Double Heterojunction Bipolar Transistors
Yutaka ARAYASHIKITakashi KAMIZONOYukio OHKUBOTaisuke MATSUMOTOYoshiaki AMANOYutaka MATSUOKA
著者情報
キーワード: DHBT, MUX, DEMUX, G-CPW, module
ジャーナル 認証あり

2013 年 E96.C 巻 6 号 p. 912-919

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抄録
We fabricated low-jitter 2:1 multiplexer (MUX) and 1:2 demultiplexer (DEMUX) modules for bit error rate testers that can be used for research into ultra-high-bitrate communication subsystems and devices with bitrates of over 100Gbit/s. The 1:2 DEMUX IC design took into consideration an IC layout allowing module pin placement for optimal utility. With regard to mounting, the 2:1 MUX and 1:2 DEMUX modules were constructed using transmission lines of grounded coplanar waveguide (G-CPW) configuration, which offers excellent high-frequency characteristics. These modules operated at 113Gbit/s with a low root mean square jitter of 548fs and 587fs, respectively.
著者関連情報
© 2013 The Institute of Electronics, Information and Communication Engineers
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