Latch-up Immune Bi-direction ESD Protection Clamp for Push-pull RF Power Amplifier

Jiang YIBO; Bi HUI; Zhao WEI; Shi CHEN; Wang XIAOLEI

doi:10.1587/transele.2019ECS6012

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Latch-up Immune Bi-direction ESD Protection Clamp for Push-pull RF Power Amplifier

Jiang YIBO, Bi HUI, Zhao WEI, Shi CHEN, Wang XIAOLEI

著者情報

キーワード: Electronic reliability, Electrostatic discharge (ESD), Bidirection protection, Push-pull amplifier

ジャーナル認証あり早期公開

論文ID: 2019ECS6012

DOI https://doi.org/10.1587/transele.2019ECS6012

この記事には本公開記事があります。

The final version of this article is now available: Vol. E103.C (2020), No. 4 pp. 194-196

詳細

抄録

For the RF power amplifier, its exposed input and output are susceptible to damage from Electrostatic (ESD) damage. The bi-direction protection is required at the input in push-pull operating mode. In this paper, considering the process compatibility to the power amplifier, cascaded Grounded-gate NMOS (ggNMOS) and Polysilicon diodes (PDIO) are stacked together to form an ESD clamp with forward and reverse protection. Through Transmission line pulse (TLP) and CV measurements, the clamp is demonstrated as latch-up immune and low parasitic capacitance bi-direction ESD protection, with 18.67/17.34V holding voltage (V_hold), 4.6/3.2kV ESD protection voltage (V_ESD), 0.401/0.415pF parasitic capacitance (C_ESD) on forward and reverse direction, respectively.

責任著者(Corresponding author)

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