Simulation-Based Understanding of “Charge-Sharing Phenomenon” induced by Heavy-Ion incident on a 65nm Bulk CMOS Memory Circuit

Akifumi Maru; Akifumi Matsuda; Satoshi Kuboyama; Mamoru Yoshimoto

doi:10.1587/transele.2021ECS6008

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Simulation-Based Understanding of “Charge-Sharing Phenomenon” induced by Heavy-Ion incident on a 65nm Bulk CMOS Memory Circuit

Akifumi Maru, Akifumi Matsuda, Satoshi Kuboyama, Mamoru Yoshimoto

著者情報

キーワード: Single event upset, Charge sharing, Device simulation, 65 nm bulk CMOS memory

ジャーナル認証あり早期公開

論文ID: 2021ECS6008

DOI https://doi.org/10.1587/transele.2021ECS6008

この記事には本公開記事があります。

The final version of this article is now available: Vol. E105.C (2022), No. 1 pp. 47-50

詳細

抄録

In order to expect the single event occurrence on highly integrated CMOS memory circuit, quantitative evaluation of charge sharing between memory cells is needed. In this study, charge sharing area induced by heavy ion incident is quantitatively calculated by using device-simulation-based method. The validity of this method is experimentally confirmed using the charged heavy ion accelerator.

責任著者(Corresponding author)

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