IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on Information Theory and Its Applications
Complexity-Reducing Algorithm for Serial Scheduled Min-Sum Decoding of LDPC Codes
Hironori UCHIKAWAKohsuke HARADA
著者情報
ジャーナル 認証あり

2009 年 E92.A 巻 10 号 p. 2411-2417

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抄録
We propose a complexity-reducing algorithm for serial scheduled min-sum decoding that reduces the number of check nodes to process during an iteration. The check nodes to skip are chosen based on the reliability, a syndrome and a log-likelihood-ratio (LLR) value, of the incoming messages. The proposed algorithm is evaluated by computer simulations and shown to reduce the decoding complexity about 20% compared with a conventional serial scheduled min-sum decoding with small fractional decibel degradation in error correction performance.
著者関連情報
© 2009 The Institute of Electronics, Information and Communication Engineers
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