IEICE Transactions on Information and Systems
Online ISSN : 1745-1361
Print ISSN : 0916-8532
Regular Section
Code Compression with Split Echo Instructions
Iver STUBDALArda KARADUMANHideharu AMANO
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2009 Volume E92.D Issue 9 Pages 1650-1656

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Abstract
Code density is often a critical issue in embedded computers, since the memory size of embedded systems is strictly limited. Echo instructions have been proposed as a method for reducing code size. This paper presents a new type of echo instruction, split echo, and evaluates an implementation of both split echo and traditional echo instructions on a MIPS R3000 based processor. Evaluation results show that memory requirement is reduced by 12% on average with small additional hardware cost.
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© 2009 The Institute of Electronics, Information and Communication Engineers
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