IEICE Transactions on Information and Systems
Online ISSN : 1745-1361
Print ISSN : 0916-8532
Regular Section
A Multidimensional Configurable Processor Array — Vocalise
Jiang LIYusuke ATSUMARIHiromasa KUBOYuichi OGISHIMASatoru YOKOTAHakaru TAMUKOHMasatoshi SEKINE
Author information
JOURNAL FREE ACCESS

2015 Volume E98.D Issue 2 Pages 313-324

Details
Abstract

A processing system with multiple field programmable gate array (FPGA) cards is described. Each FPGA card can interconnect using six I/O (up, down, left, right, front, and back) terminals. The communication network among FPGAs is scalable according to user design. When the system operates multi-dimensional applications, transmission efficiency among FPGA improved through user-adjusted dimensionality and network topologies for different applications. We provide a fast and flexible circuit configuration method for FPGAs of a multi-dimensional FPGA array. To demonstrate the effectiveness of the proposed method, we assess performance and power consumption of a circuit that calculated 3D Poisson equations using the finite difference method.

Content from these authors
© 2015 The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top