電気学会論文誌C(電子・情報・システム部門誌)
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<電気回路・電子回路>
弱反転領域で動作するMOSFETを用いた2段積み構成回路における基板効果補償手法
高窪 かをり下田 亮高窪 統
著者情報
ジャーナル フリー

2009 年 129 巻 8 号 p. 1505-1510

詳細
抄録
A parameter extraction circuit for MOSFET operating in weak inversion region is proposed. The extracted device parameter related with body effect for MOSFET is a coefficient of gate voltage degradation in a device model function deriving from the diffusion current of pn junction. With the parameter extraction circuit, the effect of gate voltage potential in MOS diode part can be controlled to be equal to that of reverse biased pn junction. So the degradation related with body effect can be compensated in spite of the different voltage between a source terminal and a bulk terminal. The proposed parameter extraction circuit can be applicated to two MOSFETs voltage subtractor and voltage follower operating under low power supply in order to compensate the body effect for MOSFETs. The characteristics of the extraction circuit fabricated with a standard 0.18μ m n-well CMOS technology are measured to investigate the basic principle. The thermal chracteristics are also measured. Measured characteristics of the proposed circuit fit to the theoretical chracteristics exactly.
著者関連情報
© 電気学会 2009
前の記事 次の記事
feedback
Top