The 22th JIEP Annual Meeting
Session ID : 18C-21
Conference information
Host: Japan Institute of Electronics Packaging
Structural Design for Minimizing Residual Stress in Stacked Silicon Chips Mounted by Flip Chip Technology
Keywords:
Residual stress,
Reliability,
Three-dimensionally stacked structure,
Structural design,
Flip chip technology using area arrayed metallic bumps
Details
