Capacitance Mismatch Evaluation for Low-power Pipeline ADC Design

Abstract

It is known that the capacitance mismatch affects the nonlinearity of pipeline analog-to-digital converters (ADCs) and that larger capacitances tend to have a smaller mismatch. On the other hand, small capacitances are desirable because they reduce the current consumption. Therefore, to achieve a low-power, high-resolution ADC, it is necessary to perform capacitance mismatch evaluation and determine the appropriate capacitance.
In this letter, a method for capacitance-mismatch measurement and the experimental results are described. The measurement results show that the mismatch is sufficiently small at the capacitance determined based on the noise requirement for 0.13-µm CMOS ADCs.