A low jitter and low reference spur 5GHz PLL with quadrature charge-sampling PD in 28nm CMOS process
Released on J-STAGE: October 10, 2024 |
Volume 21
Issue 19
Pages 20240375
Wenchen Wang, Fangxu Lv, Zhengbin Pang, Heng Huang, Zhang Luo, Xingyun Qi, Jiaqing Xu, Geng Zhang, Kewei Xin, Chengzhuo Zhao
Views: 246