抄録
This paper proposes a low voltage CMOS nano-ampere current reference circuit and presents its performance with circuit simulations in 180-nm technology. The proposed circuit consists of bias-voltage, current-source and offset-voltage sub-circuits with most of MOSFETs operating in subthreshold region. Simulation results show that the circuit generates a stable reference current of 110-nA in supply voltage range of 0.8-1.8-V with line sensitivity of 9250ppm/V. The proposed circuit is useful for composing a voltage reference circuit for ultra-low power applications.
