LETTER
A low power dB-linear RSSI based on logarithmic amplifier
2014 年 11 巻 12 号 p. 20140431
詳細
2014 年 11 巻 12 号 p. 20140431
In this paper, a low power RSSI architecture with low voltage supply is proposed, in which an improved BJT based feedback logarithmic amplifier is raised. Besides, temperature drift and process variation are considered. This approach is verified in TSMC 0.13 µm CMOS process. With a 1.2 V supply, the proposed RSSI consumes 200 µA and provides 50 dB linear range with less than 2 dB error.
