2014 年 11 巻 13 号 p. 20140357
We propose a scheme for enhancing the MPI (Message Passing Interface) broadcast function performance with supporting hardware logic to reduce a number of synchronization processes which can be avoided on a distributed memory multiprocessor system on a chip (MPSoC). We accomplish this using the concept of atomic execution which facilitates full pipeline utilization. To validate our approach, we implemented a bus functional model with systemC and evaluated the results against various message data sizes and number of nodes. Evaluation results showed that performance improvement can be achieved by up to 230% over the precedent pipelined message broadcast method. Synthesis results with 4 processing nodes show that the extra hardware cost for the proposed atomic pipelined broadcast logic occupies only 2.4% of the entire area.