Abstract
In this letter, a multi-rank parallel accessing memory system based on 3D stacking and optical interconnection technologies is proposed. This proposed memory system can be a promising solution to future many-core system’s memory accessing bottleneck. Simulation results show that the proposed memory system yields the latency reduction of transactions and enhancement of bandwidth effectively. The worst case latency of 4 ranks and 8 ranks proposed memory system can be 1/3 and 1/5 that of the electronic bus-based ones. Bandwidth enhancement of 4 ranks and 8 ranks proposed memory system can be 3.5 times and 4 times higher than that of the traditional bus-based ones.
