Abstract
A switch-back based on charge equalization switching technique for successive-approximation-register (SAR) analog-to-digital converters (ADCs) is proposed. With the proposed switching technique the average switching energy is reduced by 96.86% as compared with the conventional method. This switching scheme can also reduce the total capacitance about 75% with the comparison of the conventional architecture. With the proposed switching scheme the common mode voltage shifts only by 1LSB during all conversion steps, so the dynamic offset of comparator becomes negligible in this case.