IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Improved gain 60 GHz CMOS antenna with N-well grid
Adel BarakatAhmed AllamHala ElsadekAdel B. Abdel-RahmanRamesh K. PokharelTakana Kaho
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2016 Volume 13 Issue 5 Pages 20151115


This paper presents a novel technique to enhance Antenna-on-Chip gain by introducing a high resistivity layer below it. Instead of using the costly ion implantation method to increase resistivity, the N-well that is available in the standard CMOS process is used. A distributed grid structure of N-well on P-type substrate is designed such that the P and N semiconductors types are fully depleted forming a layer with high resistivity. By an electromagnetic simulation, the using depletion layers enhance the antenna gain and radiation efficiency without increasing the occupied area. The simulated and measured |S11| are in fair agreement. The measured gain is −1.5 dBi at 66 GHz.

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© 2016 by The Institute of Electronics, Information and Communication Engineers
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