Energy-efficient, area-efficient, high-accuracy and low-complexity switching scheme for SAR ADC

抄録

An energy-efficient, area-efficient, high-accuracy and low-complexity switching scheme for successive approximation register (SAR) analogue-to-digital converter (ADC) is proposed. In the proposed switching scheme, both the first and the second comparisons don’t consume switching energy, and all the rest of comparisons consume little switching energy. As a result, the proposed switching scheme achieves a 95.34% switching energy reduction and a 75% area reduction compared with the conventional method. In addition, only the least significant bit (LSB) is depended on the accuracy of V_cm. Moreover, only two reference voltages are used for each capacitor, which lowers complexity of digital control logic.