Signal processing system-on-chip design for biomedical applications

抄録

In view of the high demand for low-power biomedical signal-processing schemes occupying very less on-chip areas, we propose a low-power highly integrated system-on-chip (SoC) design comprising a nonuniform biomedical sensing signal conditioning circuit and a 32-bit microprocessor. The proposed design is implemented using a 0.18 µm CMOS EFLASH process in an area of 4.2 mm², and is applied in PPG, ECG and BP measurements. Experimental results show that our SoC design provides extremely good performances for sparse features of all three biomedical applications. The charge consumption is 25 mAh for three months, for an experimental board design including sleep current and junction leakage current.