2018 Volume 15 Issue 10 Pages 20180386
Metastability of RS latches can be a source of entropy for true random number generators (TRNGs). This study presents a new composition of an RS latch using the latch functionality of storage elements of Xilinx FPGAs. Our TRNG is implemented as a soft macro, or RTL description with directives, which is easily integrated into other logic components. According to our evaluation with an Artix-7 FPGA (XC7A35T), our TRNG with 320 latches (716 LUTs and 974 registers) passed the NIST SP 800-22 test suite without post-processing. Also, our new TRNG presented a 2.3x better area-delay product than the existing design to pass the diehard test.