LETTER
IP-aware cache partition and replacement scheme for mobile computing devices
2019 年 16 巻 15 号 p. 20190351
詳細
2019 年 16 巻 15 号 p. 20190351
Mobile computing devices employ multiple task-specific IP cores to improve performance and energy. With the main memory shared by all CPU cores and IPs, it becomes a critical bottleneck as increasing multimedia IPs consume significant memory bandwidth whereas the improvement of memory bandwidth lags behind. We propose an IP-aware cache management scheme for the last-level cache to reduce the load on the main-memory, while satisfying QoS requirements of frame-based multimedia applications. Evaluation with CPU applications and 4 K/60 fps video streaming applications shows that our proposed scheme reduces DRAM bandwidth by 28.62% on average over LRU and completely avoids frame-drops.
