A new method to improve the phase noise performance of the frequency synthesizer for UHF RFID

Abstract

This paper presents a fractional-N frequency synthesizer for ultra high frequency radio frequency identification (UHF RFID) reader application. With the use of a novel parallel dual inductance resonator in the inductance and capacitance based voltage-controlled oscillator (LC_VCO), the resonator cavity loss was greatly reduced as well as the temperature drift was suppressed. At the same time, the loop linearity is improved by the use of operational amplifier tracking technology. The chip is fabricated in a 0.13 µm RF CMOS technology with a single 1.2 V power supply. The synthesizer provides a tuning range from 840 MHz to 960 MHz. The worst phase noise of −95 dBc/Hz in band, −110 dBc/Hz@100 kHz offset, −135 dBc/Hz@1 MHz offset with a reference spur of −78 dBc are measured at a center frequency of 920.125 MHz. A 0.95 ps integrated RMS jitter and an 18.5 mW power dissipation are obtained at a temperature range from −40°C to 85°C.