Memory parameterized FIR filtering for digital phase-locked loop

Abstract

In this letter, a new filtering method for digital phase-locked loops (DPLLs) is proposed. The proposed method is based on finite impulse response (FIR) filtering, which estimates the state variables of a system using recent finite measurements. FIR filtering requires the optimal selection of a design parameter, the memory size, which has been cumbersome. A method to compute the optimal memory size has been proposed; however, it is ineffective when the noise information is uncertain. Thus, in this letter, a memory parameterized FIR filter (MPFF) is proposed to solve this problem, and the DPLL simulation results are presented for performance demonstration.