IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Analysis of different SiC MOSFET gate driver strategies influencing paralleling performance
Hanrui Wang, Kai Huang, Bao Liu, Tianyang Wang, Ying Xin, Huilong Zhu
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2025 Volume 22 Issue 20 Pages 20250455

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Abstract

Paralleling SiC MOSFETs has been demonstrated to enhance the rated current and power of an inverter; however, the phenomenon of unbalanced currents during conduction and shutdown imposes heightened demands on the safety of a parallel SiC MOSFET system. The utilization of SiC MOSFET gate driving strategies is of paramount importance for the efficient parallelization of SiC MOSFETs, with a significant impact on their drain-source current balance. In this paper, the effect of the symmetry of drive and power circuits on the generation of unbalanced currents between parallel SiC MOSFETs is theoretically analyzed. Then, double-pulse experiments of parallel SiC MOSFETs with one-to-many passive driver (O-T-M) and one-to-one isolated driver (O-T-O) strategies were conducted under different driving loop and power loop symmetric conditions. And the appropriate parallel working conditions for each driving strategy are obtained. A differential mode choke-based square is proposed as a solution to the unbalanced current problem of O-T-M. Under certain operating conditions, the method can achieve well-balanced flow, as verified by power and drive loop asymmetry experiments.

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© 2025 by The Institute of Electronics, Information and Communication Engineers
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