A 25 Gb/s 5.99 pJ/bit SerDes receiver with CTLE and quarter-rate adaptive loop-unrolling 5-tap DFE in 28-nm CMOS technology for wireline medium-reach interconnection

Abstract

This paper presents a SerDes receiver for medium-reach interconnection in a 28-nm CMOS process. It employs a CTLE and an adaptive quarter-rate loop-unrolling 5-tap DFE utilizing an SS-LMS algorithm to enable adaptive adjustment of tap coefficients under different channels. The proposed DFE contains CML-based summer with CMFB technology and two-stage dynamic comparator with an offset calibration loop. Simulation results show that this receiver can operate at 25 Gb/s data rate with a power efficiency of 5.99 pJ/bit, Its BER is less than 1E-12 and eye-wide-opening is 0.67 UI under 20.6-dB channel loss at 12.5 GHz Nyquist frequency.