IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
An improved reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1}
Mehdi HosseinzadehAmir Sabbagh MolahosseiniKeivan Navi
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2008 Volume 5 Issue 17 Pages 672-677

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Abstract

In this paper, a new reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1} is presented. We improved a previously introduced reverse converter architecture for deriving a high-speed hardware design. Hardware architecture of the proposed converter is based on adders, without the need for ROM or Multiplier. The presented design resulted in a significant reduction in conversion delay in comparison to the last reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1}.

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© 2008 by The Institute of Electronics, Information and Communication Engineers
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