IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
A new five-moduli set for efficient hardware implementation of the reverse converter
Amir Sabbagh MolahosseiniChitra DadkhahKeivan Navi
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JOURNALS FREE ACCESS

2009 Volume 6 Issue 14 Pages 1006-1012

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Abstract

In this paper, we propose an efficient hardware implementation of the reverse converter for the new five-moduli set {2n, 2n/2-1, 2n/2+1, 2n+1, 22n-1-1} for even n. The converter has a two-level architecture, and is based on combination of new Chinese remainder theorem 1 (New CRT-I) and mixed-radix conversion (MRC). The presented reverse converter has lower hardware requirements, and results in a significant reduction in the conversion delay, compared to the reverse converter of the latest introduced five-moduli set {2n-1, 2n, 2n+1, 2n-1-1, 2n+1-1} that has the same dynamic range as the proposed five-moduli set.

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© 2009 by The Institute of Electronics, Information and Communication Engineers
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