IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
An ILP approach to surge current minimization in high-level synthesis
Shih-Hsu HuangJheng-Fu YehChun-Hua Cheng
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2009 Volume 6 Issue 14 Pages 979-985


Power gating is recognized as a useful technique to reduce the leakage power of an idle functional unit. However, when the function unit is turned on, a sudden discharge, called surge current, is induced. If too many functional units are turned on simultaneously, the instantaneous accumulated surge current may lead to the malfunction of the circuit. In this paper, we point out the high-level synthesis (including operation scheduling and functional unit binding) has a great impact on the maximum surge current. Then, based on that observation, we propose an integer linear program (ILP) to formally draw up the surge current minimization problem in the high-level synthesis stage. Compared with the existing design flow, benchmark data show that our approach can significantly reduce the maximum surge current without any design overhead.

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© 2009 by The Institute of Electronics, Information and Communication Engineers
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