2009 Volume 6 Issue 24 Pages 1702-1707
In this paper, we propose a multi-input R23SDF-kR architecture for efficient FFT processor in MIMO-OFDM systems with n-antennas at the transmitter and receiver. The proposed architecture is based on R23SDF for low complexity and it is operated to k times clock rate for multi-stream processing like MDC pipeline method in MIMO-OFDM systems. The proposed multi-input R23SDF-kR processor reduces the hardware complexity with similar or less computation in comparison of conventional MDC methods. Comparison results show that the proposed R23SDF-4R and R23SDF-8R reduce the area about 58% and 76% compared with the most area-efficient methods at 4 × 4 and 8 × 8MIMO channels, respectively.