IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
ESD protection circuit with low triggering voltage and fast turn-on using substrate-triggered technique
Yong-Seo KooKwi-Dong KimJong-Kee Kwon
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2009 Volume 6 Issue 8 Pages 467-471

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Abstract

In this paper, ESD protection circuit with substrate-triggered technique using PNP bipolar transistor for quick discharge of the electrostatic energy is proposed. The proposed ESD protection circuit is verified by the transmission line pulse (TLP) system. The results show that the proposed ESD protection circuit has lower trigger voltage (5.98V) compared with that of conventional GGNMOS. And the proposed circuit has faster turn-on time (∼37ns) than that of the conventional substrate-triggered ESD protection circuit.

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© 2009 by The Institute of Electronics, Information and Communication Engineers
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