Wide-band, high linear low noise amplifier design in 0.18um CMOS technology

Abstract

This paper describes a technique to improve the linearity of low noise amplifier (LNA) that is implemented by the shunt-shunt feedback (SSFB) topology. By employing a parallel positive/negative feedback a suppression of the 2nd order harmonic distortion (OHD) in the feedback loop can be achieved which will result in minimization of the IM3 that is produced by mixing of this 2nd OHD with the input signal leading to an improvement of the LNA IIP3. Two LNA were fabricated using 180nm CMOS technology one adopting the conventional SSFB that was described in [1] and another one using our proposed linearization technique where an average improvement of +8dBm of IIP3 is achieved while maintaining quite similar minimum noise figure of 2.8dB, 3-dB bandwidth of 3.7GHz. Each of the fabricated LNAs consumes a current of 7.8mA from 1.8V power supply and occupies 0.007mm².