The design of compressed memory system for depth data in 3D rendering processors

抄録

We propose an effective compressed memory system to address bandwidth problem of depth data for low-power 3D rendering processors. The proposed memory system performs on-the-fly compression for depth data to be stored into external memory. If the compression rate meets or exceeds a selected threshold value, then the compressed depth data are stored into internal SRAM; otherwise the original depth data are stored into external DRAM. Experimental simulation results show that the proposed memory system could reduces the external DRAM usage by about 82%.