IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Hardware architecture for adaptive filtering based on energy-CFAR processor for radar target detection
Santos Lopez-EstradaRene Cumplido
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ジャーナル フリー

2010 年 7 巻 9 号 p. 628-633

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抄録
A hardware architecture that implements an adaptive filter based on energy analysis of radar echoes to improve the detection of the Constant False Alarm Rate (CFAR) algorithm is presented. Signal processing based on energy analysis emphasizes the edge of the echoes improving the performance of the detection process. The energy filter coefficients and CFAR parameters are calculated adaptively by the architecture, reconfiguring the block of coefficient weights according to environment conditions. The architecture accelerates the data processing by a pipeline structure and sliding window for the coefficients convolution with data, resulting in high performance operation. Results of implementing the architecture in a FPGA device are presented and discussed.
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© 2010 by The Institute of Electronics, Information and Communication Engineers
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