IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
Design and FPGA implementation of digital pulse compression for HF chirp radar based on modified orthogonal transformation
Fan WangHuotao GaoLin ZhouQingchen ZhouJie ShiYuxiang Sun
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2011 Volume 8 Issue 20 Pages 1736-1742

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Abstract

The paper presents a digital pulse compression approach for high frequency (HF) chirp radar. The emphasis is to accomplish echo signal de-chirp operation by modified orthogonal transformation on field programmable gates array (FPGA) chip. This approach has been developed for an all-digital receiver platform which is directly radio frequency (RF) band-pass sampling, compared with the traditional analog receiver or intermediate frequency (IF) receiver, it has an easy hardware structure closing to a “soft” radar mode. The system closed-loop test shows the correctness and rationality of the design, meeting the demand of engineering application.

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© 2011 by The Institute of Electronics, Information and Communication Engineers
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