IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Noise margin and short-circuit current in FGMOS logics
Luis F. Cisneros-SinencioAlejandro Diaz-SanchezJaime Ramirez-Angulo
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JOURNAL FREE ACCESS

2011 Volume 8 Issue 23 Pages 1967-1971

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Abstract

Even when floating-gate logics are very-low-voltage circuits, as power supply is reduced, large fan-in FGMOS gates are prone to fail. Thus, determining the negative impact of noise margin and short-circuit current in this type of circuits is crucial to achieve optimal operation for a particular application. For this reason, a systematic and reliable technique for obtaining the correlation between fan-in and supply voltage, simultaneously considering noise margin and short-circuit current, is proposed.

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© 2011 by The Institute of Electronics, Information and Communication Engineers
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