ADC jitter estimation using a single frequency test without requiring coherent sampling

Abstract

An accurate and cost-effective method for ADC jitter estimation is proposed. The new method only requires a single high-frequency test. Eliminating the need for a 2nd low-frequency test in the conventional dual-frequency tests can significantly save both hardware and data acquisition time. Furthermore, the proposed method does not require the condition of coherent sampling and expensive instruments. Theoretical analysis, simulation and experimental results show that the proposed method is cost-effective and can achieve the test accuracy comparable to conventional dual-frequency tests.