IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Fractional-N PLL synthesizer with 15µsec start-up time by on-chip nonvolatile memory
Jun Gyu LeeShoichi Masui
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2012 Volume 9 Issue 4 Pages 263-269


We propose a fractional-N PLL synthesizer with 15µsec start-up time featuring an open-loop VCO capacitor coarse setting and subsequent VCO control voltage setting technique with a nonvolatile memory, which can eliminate the frequency detection and VCO coarse tuning sequence used in conventional start-up acceleration techniques. The on-chip nonvolatile memory fabricated in a standard CMOS technology stores the predetermined calibration data to overcome the process variations in VCO capacitors and varactors. A prototype PLL is designed in a standard 0.18µm CMOS technology with die size of 950µm x 515µm and 10.4% area overhead of the acceleration circuits, and presents the measured start-up time of 14.6µsec.

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© 2012 by The Institute of Electronics, Information and Communication Engineers
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