抄録
Contact resistivity reduction at PtSi/Si(100) interface by dopant segregation (DS) process was investigated by the cross-bridge Kelvin resistor (CBKR) method for the first time. After the 60 nm-thick PtSi was formed at 700°C/1 min in N2 ambient, ion implantation (PH3 or BF3, 1x1015 cm-2, 15 keV) was carried out followed by the drive-in anneal at 800°C/1 min as a DS process. The Schottky barrier height (SBH) for electron and hole obtained from the C-V characteristics of PtSi/Si(100) diodes were 0.19 eV and 0.23 eV, respectively. The contact resistivity of 1.7x10-7 Ωcm2 for PtSi/p+-Si(100) and 1.8x10-6 Ωcm2 for n+-Si(100) were achieved even for the minimum contact area of 2.2 μm2 and 33 μm2, respectively.
