A simple and perfectly current matched charge pump for ultra-low voltage applications in phase-locked loops is presented. The charge pump is based on a gate switching architecture to ensure the output dynamic range. The specially designed dual compensation circuits using high threshold transistors together with regular threshold transistors ensure the current mismatch below 1.5% while keeping the output voltage ranging from 0.02 to 0.76 V in 40nm CMOS Mixed-signal technology at a 0.8V supply. And the additional body bias circuit reduces the negative impact from the process variation. The proposed circuit helps PLLs reduce the phase offset and spurs even at ultra low supply voltage.
