IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

この記事には本公開記事があります。本公開記事を参照してください。
引用する場合も本公開記事を引用してください。

A 529 GHz Dynamic Frequency Divider in 130 nm InP HBT Process
Munkyo SeoJohn HackerMiguel UrteagaAnders SkalareMark Rodwell
著者情報
ジャーナル フリー 早期公開

論文ID: 12.20141118

この記事には本公開記事があります。
詳細
抄録
This letter presents a 529 GHz 2:1 dynamic frequency divider in a 130 nm InP HBT process, which, to the best of authors’ knowledge, is the fastest frequency divider reported thus far. The presented divider is based on a novel structure to overcome bandwidth limitations of traditional dynamic frequency divider design. On-wafer measurement shows that the divider operates with the input frequency from 528.0 GHz to 529.2 GHz with bias voltage tuning, while consuming PDC ≤ 196 mW. A driver amplifier, integrated for testing purpose, dissipates 348 mW of dc power.
著者関連情報
© 2015 by The Institute of Electronics, Information and Communication Engineers
feedback
Top