IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

This article has now been updated. Please use the final version.

A 0.6V passive mixer with high conversion gain in 65 nm CMOS process
Chao ChenJianhui WuZhikuang Cai
Author information
JOURNAL FREE ACCESS Advance online publication

Article ID: 12.20141127

Details
Abstract
A passive mixer with a complementary gm stage and a low voltage IF trans-impedance amplifier, which can operate under low voltage conditions, is proposed in this letter. With at most two transistors stacked between vdd and gnd, the proposed mixer can be realized in regular CMOS processes without reducing the threshold voltage of transistors. A high conversion gain is obtained thanks to the high utilization efficiency of the RF current generated by the trans-conductance (gm) stage. A prototype of the proposed mixer structure which works in the frequency band from 1GHz to 2GHz is designed and fabricated in SMIC 65nm CMOS process. Measurement results indicate that, the prototype achieves a conversion of 22dB and a noise figure of 15dB. The power consumption is 1.2 mW under the supply voltage of 0.6V.
Content from these authors
© 2015 by The Institute of Electronics, Information and Communication Engineers
feedback
Top