IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

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Variable resolution SAR ADC architecture with 99.6% reduction in switching energy over conventional scheme
Jiaojiao YaoZhangming ZhuYutao WangYintang Yang
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ジャーナル フリー 早期公開

論文ID: 12.20150099

この記事には本公開記事があります。
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A novel energy-efficient switching method for variable resolution successive approximation register (SAR) analogue-to-digital converters (ADCs) is presented. The proposed switching scheme achieves switching energy inspired by the early reset merged capacitor switching algorithm (EMCS) and monotonic capacitor switching procedure. Besides, the dummy capacitors are used to further reduce power consumption and area. When sized for the same static linearity as the conventional SAR ADC, the proposed method enhances the efficiency of switching energy by 99.6% and reduces the total area by 93.75%. Furthermore, the proposed scheme can achieve a variable resolution for SAR ADCs.
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